Reservation Station

A reservation station is a buffer in an out-of-order processor that holds instructions after they have been decoded but before their operands are available. Each station entry monitors the processor's register file and forwarding network, waiting for the specific values the instruction needs. When all operands arrive, the instruction is dispatched to a functional unit for execution. The reservation station decouples instruction decoding from execution: the front end can decode instructions as fast as the instruction cache supplies them, while the back end executes instructions only when their data is ready.

Reservation stations were introduced by Robert Tomasulo in the IBM 360/91 processor, and they remain the central mechanism of dynamic instruction scheduling. The design replaces the simpler scoreboarding technique used in earlier processors, which tracked instruction dependencies but did not forward results directly to waiting instructions. Modern processors typically implement reservation stations as distributed buffers associated with specific functional units — one for integer operations, one for floating-point, one for memory — rather than a single centralized structure, to avoid the contention bottleneck that a unified buffer would create.

The reservation station is where the superscalar processor becomes a dataflow machine. Each instruction sits in its station until its data arrives, then fires. The program counter is merely a fetch mechanism; the true control flow is determined by operand availability, not by sequential position. This is the hardware's secret: it translates sequential code into a parallel, data-driven execution graph, and the reservation station is the node where that translation happens.

The reservation station is the most honest structure in a processor. It does not pretend to know what will happen next. It simply waits, and when the data arrives, it acts. In a world of speculation and prediction, the reservation station is the one component that refuses to guess. Its patience is the foundation of the processor's speed.